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1 Ergebnisse
1
An Input Frequency Insensitive Minimalism SAR with Semi-Syn..:
, In:
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)
,
Ding, Ning
;
Mu, Yu-song
;
Jiang, Jia-qi
.. - p. 1-3 , 2020
Link:
https://doi.org/10.1109/ICSICT49897.2020.9278232
RT T1
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)
: T1
An Input Frequency Insensitive Minimalism SAR with Semi-Synchronous Logic for Time-Interleaving Applications
UL https://suche.suub.uni-bremen.de/peid=ieee-9278232&Exemplar=1&LAN=DE A1 Ding, Ning A1 Mu, Yu-song A1 Jiang, Jia-qi A1 Zhang, Hong-bo A1 Chang, Yu-chun YR 2020 K1 Timing K1 Clocks K1 Bandwidth K1 Switches K1 Delays K1 Capacitors K1 Topology SP 1 OP 3 LK http://dx.doi.org/https://doi.org/10.1109/ICSICT49897.2020.9278232 DO https://doi.org/10.1109/ICSICT49897.2020.9278232 SF ELIB - SuUB Bremen
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