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1 Ergebnisse
1
Decreasing the Power Dissipation and Switching Time in Hybr..:
, In:
2020 2nd Al-Noor International Conference for Science and Technology (NICST)
,
Kadhim, Maha Kh.
;
Naife, Riyadh M.
;
Kadhim, Waleed Kh.
- p. 51-56 , 2020
Link:
https://doi.org/10.1109/NICST50904.2020.9280314
RT T1
2020 2nd Al-Noor International Conference for Science and Technology (NICST)
: T1
Decreasing the Power Dissipation and Switching Time in Hybrid AND Gate Logic Circuit
UL https://suche.suub.uni-bremen.de/peid=ieee-9280314&Exemplar=1&LAN=DE A1 Kadhim, Maha Kh. A1 Naife, Riyadh M. A1 Kadhim, Waleed Kh. YR 2020 K1 Logic gates K1 Integrated circuit modeling K1 Semiconductor device modeling K1 Nanoelectromechanical systems K1 Transistors K1 Analytical models K1 Power dissipation K1 hybrid AND gate K1 CMOS-NEMS K1 CMOS AND gate K1 Traditional K1 MATLAB /Simulink SP 51 OP 56 LK http://dx.doi.org/https://doi.org/10.1109/NICST50904.2020.9280314 DO https://doi.org/10.1109/NICST50904.2020.9280314 SF ELIB - SuUB Bremen
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