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1 Ergebnisse
1
HLS Based Implementation of Modified DE-RIW Algorithm on FP..:
, In:
2020 IEEE 1st International Conference for Convergence in Engineering (ICCE)
,
Shivdeep
;
Biswas, Ankur
;
Ghosh, Sudip
... - p. 439-443 , 2020
Link:
https://doi.org/10.1109/ICCE50343.2020.9290711
RT T1 <cTitle>2020 IEEE 1st International Conference for Convergence in Engineering (ICCE)</cTitle>: T1 <Title>HLS Based Implementation of Modified DE-RIW Algorithm on FPGA and P-SoC</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9290711&Exemplar=1&LAN=DE A1 Shivdeep A1 Biswas, Ankur A1 Ghosh, Sudip A1 Nag, Tridibesh A1 Maity, Santi Prasad A1 Rahaman, Hafizur YR 2020 K1 Field programmable gate arrays K1 Watermarking K1 Computer architecture K1 Hardware K1 Conferences K1 Very large scale integration K1 Convergence K1 Difference Expansion K1 FPGA K1 High Level Synthesis K1 SoC K1 Reversible K1 Data Hiding SP 439 OP 443 LK http://dx.doi.org/https://doi.org/10.1109/ICCE50343.2020.9290711 DO https://doi.org/10.1109/ICCE50343.2020.9290711 SF ELIB - SuUB Bremen
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