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A Unique Design of Hybrid Full Adder for the Application of..:
, In:
2020 4th International Conference on Electronics, Communication and Aerospace Technology (ICECA)
,
Singh, Salam Surjit
;
Leishangthem, Dolly
;
Shah, Md. Nasiruddin
. - p. 260-264 , 2020
Link:
https://doi.org/10.1109/ICECA49313.2020.9297594
RT T1
2020 4th International Conference on Electronics, Communication and Aerospace Technology (ICECA)
: T1
A Unique Design of Hybrid Full Adder for the Application of Low Power VLSI Circuits
UL https://suche.suub.uni-bremen.de/peid=ieee-9297594&Exemplar=1&LAN=DE A1 Singh, Salam Surjit A1 Leishangthem, Dolly A1 Shah, Md. Nasiruddin A1 Shougaijam, Biraj YR 2020 K1 Transistors K1 Adders K1 Logic gates K1 Hybrid power systems K1 Delays K1 Very large scale integration K1 Power demand K1 Average power K1 Hybrid Full Adder (HFA) K1 low power K1 power delay product and VLSI SP 260 OP 264 LK http://dx.doi.org/https://doi.org/10.1109/ICECA49313.2020.9297594 DO https://doi.org/10.1109/ICECA49313.2020.9297594 SF ELIB - SuUB Bremen
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