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1 Ergebnisse
1
Combining Topological & Physical Pattern Recognition To Enh..:
, In:
2020 IEEE International Integrated Reliability Workshop (IIRW)
,
Hany, Sherif
;
Byun, Sunsoo
;
Sarhan, Hossam
... - p. 1-4 , 2020
Link:
https://doi.org/10.1109/IIRW49815.2020.9312861
RT T1 <cTitle>2020 IEEE International Integrated Reliability Workshop (IIRW)</cTitle>: T1 <Title>Combining Topological & Physical Pattern Recognition To Enhance Memory Chip Reliability</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9312861&Exemplar=1&LAN=DE A1 Hany, Sherif A1 Byun, Sunsoo A1 Sarhan, Hossam A1 Medhat, Dina A1 ElRefaee, Mohamed A1 Jang, Jaehyun A1 Jeong, Baekryong A1 Choi, Hyunseung A1 Choi, Sunmi A1 Muirhead, Jonathan A1 Hogan, Matthew YR 2020 SN 2374-8036 K1 Reliability K1 Integrated circuit reliability K1 Reliability engineering K1 Layout K1 Fingers K1 Pattern matching K1 Debugging K1 Memory K1 NAND K1 DRAM K1 reliability verification K1 memory robustness K1 symmetry K1 matching K1 sense amplifier K1 topological pattern K1 electrical pattern K1 geometrical pattern SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/IIRW49815.2020.9312861 DO https://doi.org/10.1109/IIRW49815.2020.9312861 SF ELIB - SuUB Bremen
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