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From Silicon to Simulation: A Full Decomposition of a Fabri..:
, In:
2020 IEEE Physical Assurance and Inspection of Electronics (PAINE)
,
Kimura, Adam G.
;
Waite, Adam R.
;
Scholl, Jon
... - p. 1-6 , 2020
Link:
https://doi.org/10.1109/PAINE49178.2020.9337733
RT T1 <cTitle>2020 IEEE Physical Assurance and Inspection of Electronics (PAINE)</cTitle>: T1 <Title>From Silicon to Simulation: A Full Decomposition of a Fabricated 130 nm Serial Peripheral Interface for Establishing an Assurance Baseline Root-of-Trust</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9337733&Exemplar=1&LAN=DE A1 Kimura, Adam G. A1 Waite, Adam R. A1 Scholl, Jon A1 Schaffranek, James A1 Sutter, Matt A1 Via, Glen D. YR 2020 K1 SRAM chips K1 Layout K1 Inspection K1 Feature extraction K1 Silicon K1 Microelectronics K1 Integrated circuit modeling K1 verification K1 validation K1 hardware assurance K1 trust K1 integrated circuit K1 decomposition K1 root-of-trust K1 microelectronics SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/PAINE49178.2020.9337733 DO https://doi.org/10.1109/PAINE49178.2020.9337733 SF ELIB - SuUB Bremen
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