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A Reconfigurable Accelerator for Generative Adversarial Net..:
, In:
2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
,
Yin, Tongtong
;
Mao, Wendong
;
Lu, Jinming
. - p. 144-149 , 2021
Link:
https://doi.org/10.1109/ISVLSI51109.2021.00036
RT T1 <cTitle>2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)</cTitle>: T1 <Title>A Reconfigurable Accelerator for Generative Adversarial Network Training Based on FPGA</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9516779&Exemplar=1&LAN=DE A1 Yin, Tongtong A1 Mao, Wendong A1 Lu, Jinming A1 Wang, Zhongfeng YR 2021 SN 2159-3477 K1 Training K1 Convolution K1 Image synthesis K1 Computer architecture K1 Very large scale integration K1 Generative adversarial networks K1 Throughput K1 hardware accelerator K1 training accelerator K1 reconfigurable design K1 FPGA SP 144 OP 149 LK http://dx.doi.org/https://doi.org/10.1109/ISVLSI51109.2021.00036 DO https://doi.org/10.1109/ISVLSI51109.2021.00036 SF ELIB - SuUB Bremen
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