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1 Ergebnisse
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Low Power and Area Efficieny ALU With Different Type of Low..:
, In:
2021 Asian Conference on Innovation in Technology (ASIANCON)
,
Maniusha, K Aruna
;
Naresh, B
;
Subodh, D
. - p. 1-6 , 2021
Link:
https://doi.org/10.1109/ASIANCON51346.2021.9544561
RT T1
2021 Asian Conference on Innovation in Technology (ASIANCON)
: T1
Low Power and Area Efficieny ALU With Different Type of Low Power in Full Adders
UL https://suche.suub.uni-bremen.de/peid=ieee-9544561&Exemplar=1&LAN=DE A1 Maniusha, K Aruna A1 Naresh, B A1 Subodh, D A1 Sahithya, K YR 2021 K1 Multiplexing K1 Technological innovation K1 Power demand K1 Operating systems K1 Logic gates K1 Transistors K1 Adders K1 Gate Diffusion Input Technique K1 XNOR logic K1 2T XOR logic K1 Pass Transistors SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/ASIANCON51346.2021.9544561 DO https://doi.org/10.1109/ASIANCON51346.2021.9544561 SF ELIB - SuUB Bremen
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