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1 Ergebnisse
1
RTL to GDSII of Harvard Structure RISC Processor:
, In:
2021 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT)
,
Ravish Aradhya, H. V.
;
Kanase, Gopal
;
Y, Vinayakgouda
- p. 1-4 , 2021
Link:
https://doi.org/10.1109/CONECCT52877.2021.9622735
RT T1
2021 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT)
: T1
RTL to GDSII of Harvard Structure RISC Processor
UL https://suche.suub.uni-bremen.de/peid=ieee-9622735&Exemplar=1&LAN=DE A1 Ravish Aradhya, H. V. A1 Kanase, Gopal A1 Y, Vinayakgouda YR 2021 SN 2766-2101 K1 Reduced instruction set computing K1 Simulation K1 Computer architecture K1 Tools K1 Logic gates K1 Very large scale integration K1 Routing K1 RTL K1 Harvard Structure K1 GDSII K1 MIPS K1 RISC K1 Clock Tree Synthesis K1 Placement K1 Physical Design SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/CONECCT52877.2021.9622735 DO https://doi.org/10.1109/CONECCT52877.2021.9622735 SF ELIB - SuUB Bremen
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