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1 Ergebnisse
1
A Memory Built-In Peer-Repair Architecture for Mesh-Connect..:
, In:
2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)
,
Tan, Pai-Yu
;
Tung, Chih-Hsuan
;
Wu, Cheng-Wen
.. - p. 1-4 , 2022
Link:
https://doi.org/10.1109/VLSI-DAT54769.2022.9768060
RT T1
2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)
: T1
A Memory Built-In Peer-Repair Architecture for Mesh-Connected Processor Array
UL https://suche.suub.uni-bremen.de/peid=ieee-9768060&Exemplar=1&LAN=DE A1 Tan, Pai-Yu A1 Tung, Chih-Hsuan A1 Wu, Cheng-Wen A1 Lee, Mincent A1 Liao, Gordon YR 2022 SN 2472-9124 K1 Design automation K1 Memory architecture K1 AI accelerators K1 Parallel processing K1 Maintenance engineering K1 Very large scale integration K1 Topology K1 built-in self-repair (BISR) K1 embedded memory K1 memory repair K1 memory testing K1 mesh-connected processor array K1 redundancy analysis K1 spare allocation SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/VLSI-DAT54769.2022.9768060 DO https://doi.org/10.1109/VLSI-DAT54769.2022.9768060 SF ELIB - SuUB Bremen
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