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1 Ergebnisse
1
An Area Efficient FFT Processor using Modified Compressor a..:
, In:
2022 6th International Conference on Devices, Circuits and Systems (ICDCS)
,
Dhanasekar, S.
;
Bruntha, P. Malin
;
Ahmed, L. Jubair
... - p. 62-66 , 2022
Link:
https://doi.org/10.1109/ICDCS54290.2022.9780676
RT T1
2022 6th International Conference on Devices, Circuits and Systems (ICDCS)
: T1
An Area Efficient FFT Processor using Modified Compressor adder based Vedic Multiplier
UL https://suche.suub.uni-bremen.de/peid=ieee-9780676&Exemplar=1&LAN=DE A1 Dhanasekar, S. A1 Bruntha, P. Malin A1 Ahmed, L. Jubair A1 Valarmathi, G. A1 Govindaraj, V. A1 Priya, C. YR 2022 SN 2644-1802 K1 OFDM K1 Hardware K1 Table lookup K1 Registers K1 Delays K1 Time-domain analysis K1 Adders K1 Virtex 6 K1 Modified Compressor adder K1 Fast Fourier Transform K1 Multi-radix K1 Urdhav Tiryakbhyam Vedic Multiplier SP 62 OP 66 LK http://dx.doi.org/https://doi.org/10.1109/ICDCS54290.2022.9780676 DO https://doi.org/10.1109/ICDCS54290.2022.9780676 SF ELIB - SuUB Bremen
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