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1 Ergebnisse
1
A 40nm Analog-Input ADC-Free Compute-in-Memory RRAM Macro w..:
, In:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
,
Jiang, Hongwu
;
Li, Wantong
;
Huang, Shanshi
. - p. 266-267 , 2022
Link:
https://doi.org/10.1109/VLSITechnologyandCir46769.2022..
RT T1
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
: T1
A 40nm Analog-Input ADC-Free Compute-in-Memory RRAM Macro with Pulse-Width Modulation between Sub-arrays
UL https://suche.suub.uni-bremen.de/peid=ieee-9830211&Exemplar=1&LAN=DE A1 Jiang, Hongwu A1 Li, Wantong A1 Huang, Shanshi A1 Yu, Shimeng YR 2022 SN 2158-9682 K1 Transient response K1 Quantization (signal) K1 Stars K1 Random access memory K1 Prototypes K1 Very large scale integration K1 Pulse width modulation K1 RRAM K1 CIM K1 PWM K1 ADC-free SP 266 OP 267 LK http://dx.doi.org/https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830211 DO https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830211 SF ELIB - SuUB Bremen
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