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An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped ..:

, In: 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),

Yonar, A. Serdar ; Francese, Pier Andrea ; Brandli, Matthias... - p. 168-169 , 2022

Link: https://doi.org/10.1109/VLSITechnologyandCir46769.2022..

RT 
T1 <cTitle>2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS</Title>

UL https://suche.suub.uni-bremen.de/peid=ieee-9830308&Exemplar=1&LAN=DE
				
A1 Yonar, A. Serdar
A1 Francese, Pier Andrea
A1 Brandli, Matthias
A1 Kossel, Marcel
A1 Morf, Thomas
A1 Proesel, Jonathan E.
A1 Rylov, Sergey
A1 Ainspan, Herschel
A1 Cochet, Martin
A1 Deniz, Zeynep
A1 Dickson, Timothy
A1 Beukema, Troy
A1 Baks, Christian
A1 Beakes, Michael
A1 Bulzacchelli, John F.
A1 Choi, Young-Ho
A1 Yoo, Byoung-Joo
A1 Ahn, Hyoungbae
A1 Lim, Dong-Hyuk
A1 Kang, Gunil
A1 Park, Sang-Hune
A1 Meghelli, Mounir
A1 Rhew, Hyo-Gyuem
A1 Friedman, Daniel
A1 Choi, Michael
A1 Soyuer, Mehmet
A1 Shin, Jongshin
YR 2022
SN 2158-9682
K1 Total harmonic distortion
K1 Layout
K1 Linearity
K1 Bandwidth
K1 Very large scale integration
K1 CMOS technology
K1 Frequency measurement
K1 Bootstrapped Track-and-Hold
K1 Class-AB Buffer
K1 Time-Interleaved ADC
K1 asynchronous SAR
SP 168
OP 169
LK http://dx.doi.org/https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830308
DO https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830308
SF ELIB - SuUB Bremen

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