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1 Ergebnisse
1
A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Proce..:
, In:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
,
Chen, Kuan-Yu
;
Yang, Chi-Sheng
;
Sun, Yu-Hsiu
... - p. 202-203 , 2022
Link:
https://doi.org/10.1109/VLSITechnologyandCir46769.2022..
RT T1 <cTitle>2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Processor for Wireless Communication and Linear-Algebra Kernels in 12nm FINFET</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9830330&Exemplar=1&LAN=DE A1 Chen, Kuan-Yu A1 Yang, Chi-Sheng A1 Sun, Yu-Hsiu A1 Tseng, Chien-Wei A1 Fayazi, Morteza A1 He, Xin A1 Feng, Siying A1 Yue, Yufan A1 Mudge, Trevor A1 Dreslinski, Ronald A1 Kim, Hun-Seok A1 Blaauw, David YR 2022 SN 2158-9682 K1 Wireless communication K1 5G mobile communication K1 Loading K1 Very large scale integration K1 FinFETs K1 Data communication K1 Kernel SP 202 OP 203 LK http://dx.doi.org/https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830330 DO https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830330 SF ELIB - SuUB Bremen
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