Titel

Merkliste
1 Ergebnisse

A 40-Gb/s/pin Low-Voltage POD Single-Ended PAM-4 Transceive..:

, In: 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),

Rie, Hyunsub Norbert ; Yoon, Chang Soo ; Byun, Jindo... - p. 148-149 , 2022

Link: https://doi.org/10.1109/VLSITechnologyandCir46769.2022..

RT 
T1 <cTitle>2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)</cTitle>: T1 <Title>A 40-Gb/s/pin Low-Voltage POD Single-Ended PAM-4 Transceiver with Timing Calibrated Reset-less Slicer and Bidirectional T-Coil for GDDR7 Application</Title>

UL https://suche.suub.uni-bremen.de/peid=ieee-9830507&Exemplar=1&LAN=DE
				
A1 Rie, Hyunsub Norbert
A1 Yoon, Chang Soo
A1 Byun, Jindo
A1 Lee, Sucheol
A1 Kim, Garam
A1 Kim, Joohwan
A1 Park, Junyoung
A1 Cho, Hyunyoon
A1 Um, Youngdo
A1 Jin, Hyungmin
A1 Shin, Kwangseob
A1 Jung, Minsu
A1 Cha, Go-Eun
A1 Lee, Minjae
A1 Kim, YoungMin
A1 Han, Byeori
A1 Jeon, Yuseong
A1 Lee, Jisun
A1 Shin, EunSeok
A1 Kwon, Hyuk-Jun
A1 Choi, Youngdon
A1 Choi, Jung-Hwan
A1 Ko, Hyungjong
YR 2022
SN 2158-9682
K1 Semiconductor device measurement
K1 Power demand
K1 Random access memory
K1 Prototypes
K1 Receivers
K1 Very large scale integration
K1 Size measurement
K1 single-ended
K1 PAM-4 transceiver
K1 reset-less slicer
K1 LV-POD
K1 asymmetric bidirectional T-coil
K1 memory interface
K1 GDDR7
SP 148
OP 149
LK http://dx.doi.org/https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830507
DO https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830507
SF ELIB - SuUB Bremen

Export

RefWorks (nur Desktop-Version!)
Flow (Zuerst in Flow einloggen, dann importieren)