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1 Ergebnisse
1
Bottom Dielectric Isolation to Suppress Sub-Fin Parasitic C..:
, In:
2022 China Semiconductor Technology International Conference (CSTIC)
,
Cao, Lei
;
Liu, Yang
;
Wu, Zhenhua
... - p. 1-3 , 2022
Link:
https://doi.org/10.1109/CSTIC55103.2022.9856910
RT T1
2022 China Semiconductor Technology International Conference (CSTIC)
: T1
Bottom Dielectric Isolation to Suppress Sub-Fin Parasitic Channel of Vertically-Stacked Horizontal Gate-All-Around Si Nanosheets Devices
UL https://suche.suub.uni-bremen.de/peid=ieee-9856910&Exemplar=1&LAN=DE A1 Cao, Lei A1 Liu, Yang A1 Wu, Zhenhua A1 Zhang, Qingzhu A1 Yao, Jiaxin A1 Luo, Yanna A1 Xu, Haoqing A1 Zhao, Peng A1 Luo, Kun A1 Wu, Yongqin A1 Bu, Weihai A1 Yin, Huaxiang YR 2022 K1 Field effect transistors K1 Gallium arsenide K1 Logic gates K1 Silicon K1 Stability analysis K1 Nanoscale devices K1 Dielectrics K1 Nanosheet FETs (NSFETs) K1 TCAD simulation K1 sub-fin K1 bottom dielectric isolation (BDI) SP 1 OP 3 LK http://dx.doi.org/https://doi.org/10.1109/CSTIC55103.2022.9856910 DO https://doi.org/10.1109/CSTIC55103.2022.9856910 SF ELIB - SuUB Bremen
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