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1 Ergebnisse
1
OpenCL-Based Design of an FPGA Accelerator for H.266/VVC Tr..:
, In:
2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS)
,
Waidyasooriya, Hasitha Muthumala
;
Hariyama, Masanori
;
Iwasaki, Hiroe
... - p. 1-4 , 2022
Link:
https://doi.org/10.1109/MWSCAS54063.2022.9859281
RT T1
2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS)
: T1
OpenCL-Based Design of an FPGA Accelerator for H.266/VVC Transform and Quantization
UL https://suche.suub.uni-bremen.de/peid=ieee-9859281&Exemplar=1&LAN=DE A1 Waidyasooriya, Hasitha Muthumala A1 Hariyama, Masanori A1 Iwasaki, Hiroe A1 Kobayashi, Daisuke A1 Omori, Yuya A1 Nakamura, Ken A1 Nitta, Koyo A1 Sano, Kimikazu YR 2022 SN 1558-3899 K1 Quantization (signal) K1 Transforms K1 Encoding K1 Kernel K1 Computational complexity K1 Task analysis K1 Standards K1 Video compression K1 H.265 K1 H.266 K1 video encoder K1 FPGA K1 OpenCL SP 1 OP 4 LK http://dx.doi.org/https://doi.org/10.1109/MWSCAS54063.2022.9859281 DO https://doi.org/10.1109/MWSCAS54063.2022.9859281 SF ELIB - SuUB Bremen
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