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1
A Real Time Multi-Bit DAC Mismatch Estimation & Correction ..:
, In:
2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID)
,
Bal, Ankur
;
Gupta, Sharad
;
Singh, Rupesh
- p. 39-43 , 2022
Link:
https://doi.org/10.1109/VLSID2022.2022.00020
RT T1 <cTitle>2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID)</cTitle>: T1 <Title>A Real Time Multi-Bit DAC Mismatch Estimation & Correction Technique For Wideband Continuous Time Sigma Delta Modulators</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9885900&Exemplar=1&LAN=DE A1 Bal, Ankur A1 Gupta, Sharad A1 Singh, Rupesh YR 2022 SN 2380-6923 K1 Sigma-delta modulation K1 Feedback loop K1 Quantization (signal) K1 Modulation K1 Estimation K1 Computer architecture K1 Very large scale integration K1 Continuous Time Sigma Delta Modulator K1 Feedback DAC K1 Low Power SP 39 OP 43 LK http://dx.doi.org/https://doi.org/10.1109/VLSID2022.2022.00020 DO https://doi.org/10.1109/VLSID2022.2022.00020 SF ELIB - SuUB Bremen
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