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MAPPARAT: A Resource Constrained FPGA-Based Accelerator for..:
, In:
2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID)
,
Ashuthosh, M. R.
;
Krishna, Santosh
;
Sudarshan, Vishvas
.. - p. 102-107 , 2022
Link:
https://doi.org/10.1109/VLSID2022.2022.00031
RT T1 <cTitle>2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID)</cTitle>: T1 <Title>MAPPARAT: A Resource Constrained FPGA-Based Accelerator for Sparse-Dense Matrix Multiplication</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9885949&Exemplar=1&LAN=DE A1 Ashuthosh, M. R. A1 Krishna, Santosh A1 Sudarshan, Vishvas A1 Subramaniyan, Srinivasan A1 Purnaprajna, Madhura YR 2022 SN 2380-6923 K1 Performance evaluation K1 Deep learning K1 Energy consumption K1 Embedded systems K1 Redundancy K1 Neural networks K1 Very large scale integration SP 102 OP 107 LK http://dx.doi.org/https://doi.org/10.1109/VLSID2022.2022.00031 DO https://doi.org/10.1109/VLSID2022.2022.00031 SF ELIB - SuUB Bremen
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