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Thermal-Aware Optimization of SoC Floorplan with Heterogeno..:

, In: 2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm),

Yoo, Jongkyu ; An, Taekeun ; Oh, Chigwan... - p. 1-6 , 2022

Link: https://doi.org/10.1109/iTherm54085.2022.9899498

RT 
T1 <cTitle>2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm)</cTitle>: T1 <Title>Thermal-Aware Optimization of SoC Floorplan with Heterogenous Multi-Cores</Title>

UL https://suche.suub.uni-bremen.de/peid=ieee-9899498&Exemplar=1&LAN=DE
				
A1 Yoo, Jongkyu
A1 An, Taekeun
A1 Oh, Chigwan
A1 Cho, Youngsang
A1 Lee, Heeseok
A1 Im, Yunhyeok
A1 Kim, Minkyu
A1 Kim, Minsu
YR 2022
SN 2694-2135
K1 Couplings
K1 Costs
K1 Thermal resistance
K1 Thermomechanical processes
K1 Optimization methods
K1 Electronic packaging thermal management
K1 Threshold voltage
K1 System on Chip (SoC)
K1 Cooling Zone (CZ)
K1 Keep Out Zone (KOZ)
K1 Central Processing Unit (CPU)
K1 Package on Package (POP)
K1 Regular Voltage Threshold (RVT)
K1 Low Voltage Threshold (LVT)
K1 Thermal Interface Material (TIM)
K1 Epoxy Modeling Compound (EMC)
SP 1
OP 6
LK http://dx.doi.org/https://doi.org/10.1109/iTherm54085.2022.9899498
DO https://doi.org/10.1109/iTherm54085.2022.9899498
SF ELIB - SuUB Bremen

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