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1
Translation-optimized Memory Compression for Capacity:
, In:
2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO)
,
Panwar, Gagandeep
;
Laghari, Muhammad
;
Bears, David
... - p. 992-1011 , 2022
Link:
https://doi.org/10.1109/MICRO56248.2022.00073
RT T1 <cTitle>2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO)</cTitle>: T1 <Title>Translation-optimized Memory Compression for Capacity</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9923870&Exemplar=1&LAN=DE A1 Panwar, Gagandeep A1 Laghari, Muhammad A1 Bears, David A1 Liu, Yuqing A1 Jearls, Chandler A1 Choukse, Esha A1 Cameron, Kirk W. A1 Butt, Ali R. A1 Jian, Xun YR 2022 K1 Industries K1 Art K1 Microarchitecture K1 Prefetching K1 Memory management K1 Random access memory K1 Hardware K1 memory K1 hardware memory compression K1 address translation K1 memory subsystem K1 compression ASIC SP 992 OP 1011 LK http://dx.doi.org/https://doi.org/10.1109/MICRO56248.2022.00073 DO https://doi.org/10.1109/MICRO56248.2022.00073 SF ELIB - SuUB Bremen
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