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1 Ergebnisse
1
Design of a 5-bit Signed SRAM-based In-Memory Computing Cel..:
, In:
2022 IEEE International Symposium on Circuits and Systems (ISCAS)
,
Pereira-Rial, O.
;
Garcia-Lesta, D.
;
Brea, V.M.
.. - p. 702-706 , 2022
Link:
https://doi.org/10.1109/ISCAS48785.2022.9937766
RT T1
2022 IEEE International Symposium on Circuits and Systems (ISCAS)
: T1
Design of a 5-bit Signed SRAM-based In-Memory Computing Cell for Deep Learning Models
UL https://suche.suub.uni-bremen.de/peid=ieee-9937766&Exemplar=1&LAN=DE A1 Pereira-Rial, O. A1 Garcia-Lesta, D. A1 Brea, V.M. A1 Lopez, P. A1 Cabello, D. YR 2022 SN 2158-1525 K1 Semiconductor device modeling K1 Deep learning K1 Computational modeling K1 Neural networks K1 Layout K1 In-memory computing K1 Convolutional neural networks K1 convnets K1 neural network hardware accelerator K1 mixed-mode K1 artificial intelligence on the edge SP 702 OP 706 LK http://dx.doi.org/https://doi.org/10.1109/ISCAS48785.2022.9937766 DO https://doi.org/10.1109/ISCAS48785.2022.9937766 SF ELIB - SuUB Bremen
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