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1 Ergebnisse
1
A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Mul..:
, In:
2022 IEEE International Symposium on Circuits and Systems (ISCAS)
,
Kushwaha, Dinesh
;
Sharma, Aditya
;
Gupta, Neha
... - p. 1556-1560 , 2022
Link:
https://doi.org/10.1109/ISCAS48785.2022.9937908
RT T1 <cTitle>2022 IEEE International Symposium on Circuits and Systems (ISCAS)</cTitle>: T1 <Title>A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and Accumulate Operation by Employing Charge Sharing</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9937908&Exemplar=1&LAN=DE A1 Kushwaha, Dinesh A1 Sharma, Aditya A1 Gupta, Neha A1 Raj, Ritik A1 Joshi, Ashish A1 Mishra, Jwalant A1 Kohli, Rajat A1 Miryala, Sandeep A1 Joshi, Rajiv A1 Dasgupta, Sudeb A1 Bulusu, Anand YR 2022 SN 2158-1525 K1 Partial discharges K1 Random access memory K1 Voltage K1 Computer architecture K1 Parallel processing K1 Throughput K1 Energy efficiency K1 Analog K1 bitline K1 binary K1 compute-In-Memory (CIM) K1 energy K1 multiply and accumulate (MAC) SP 1556 OP 1560 LK http://dx.doi.org/https://doi.org/10.1109/ISCAS48785.2022.9937908 DO https://doi.org/10.1109/ISCAS48785.2022.9937908 SF ELIB - SuUB Bremen
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