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1 Ergebnisse
1
CRLock: A SAT and FALL Attacks Resistant Logic Locking Meth..:
, In:
2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
,
Yoshimura, Masayoshi
;
Tsujikawa, Atsuya
;
Yamazaki, Hiroshi
. - p. 1-6 , 2022
Link:
https://doi.org/10.1109/DFT56152.2022.9962349
RT T1
2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
: T1
CRLock: A SAT and FALL Attacks Resistant Logic Locking Method at Register Transfer Level
UL https://suche.suub.uni-bremen.de/peid=ieee-9962349&Exemplar=1&LAN=DE A1 Yoshimura, Masayoshi A1 Tsujikawa, Atsuya A1 Yamazaki, Hiroshi A1 Hosokawa, Toshinori YR 2022 SN 2765-933X K1 Resistance K1 Fault tolerance K1 Fault tolerant systems K1 Companies K1 Very large scale integration K1 Logic gates K1 Registers K1 logic locking K1 register transfer level K1 SAT attack resistance K1 FALL attack resistance K1 design for security SP 1 OP 6 LK http://dx.doi.org/https://doi.org/10.1109/DFT56152.2022.9962349 DO https://doi.org/10.1109/DFT56152.2022.9962349 SF ELIB - SuUB Bremen
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