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1 Ergebnisse
1
Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Ve..:
, In:
2022 25th Euromicro Conference on Digital System Design (DSD)
,
Soria-Pardos, Victor
;
Doblas, Max
;
Lopez-Paradis, Guillem
... - p. 254-261 , 2022
Link:
https://doi.org/10.1109/DSD57027.2022.00042
RT T1 <cTitle>2022 25th Euromicro Conference on Digital System Design (DSD)</cTitle>: T1 <Title>Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI</Title> UL https://suche.suub.uni-bremen.de/peid=ieee-9996608&Exemplar=1&LAN=DE A1 Soria-Pardos, Victor A1 Doblas, Max A1 Lopez-Paradis, Guillem A1 Candon, Gerard A1 Rodas, Narcis A1 Carril, Xavier A1 Fontova-Muste, Pau A1 Leyva, Neiel A1 Marco-Sola, Santiago A1 Moreto, Miquel YR 2022 SN 2771-2508 K1 Out of order K1 Runtime K1 High performance computing K1 Pipelines K1 Computer architecture K1 Benchmark testing K1 Solids K1 RISC-V K1 computer architecture K1 vector instructions K1 domain-specific accelerators SP 254 OP 261 LK http://dx.doi.org/https://doi.org/10.1109/DSD57027.2022.00042 DO https://doi.org/10.1109/DSD57027.2022.00042 SF ELIB - SuUB Bremen
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